Embedded FPGA Engineer

Job summary

Embedded FPGA Engineer The Opportunity: We are seeking a motivated FPGA, and software engineer to support the development, optimization, and deployment of digital signal processing (DSP) functions on a SOSA/VPX system. As a member of our engineering team, you will be responsible for designing, implementing, and validating system components.

Benefits

Qualifications

• shaping development roadmaps, or supporting Agile workflows
• Experience with modern agentic engineering workflows, including AI‑driven automation for FPGA design, simulation, synthesis, or testing
• Master's degree in Electrical Engineering, Computer Engineering, or a related field
• Clearance:
• Applicants selected will be subject to a security investigation and may need to meet eligibility
• for access to classified information.
• Compensation
• At Booz Allen, we celebrate your contributions, provide you with opportunities and choices, and support your total well-being.
• Our offerings include health, life, disability, financial, and retirement
• The projected compensation range for this position is $86,800.00 to $198,000.00 (annualized USD).
• The estimate displayed represents the typical salary range for this position and is just one component of Booz Allen’s total compensation package for employees.
• This posting will close within 90 days from the Posting Date.

Responsibilities

• As a member of our engineering team, you will be responsible for designing, implementing, and validating system components.
• You will contribute to building Rf signal processing applications on an embedded platform and with cutting edge FPGAs.
• Design and implement FPGA‑based DSP systems using, HDL, Vitis HLS and modern FPGA toolchains
• Develop and optimize DSP algorithms including filtering, detection, synchronization, modulation and demodulation, transforms into high‑throughput, resource‑efficient hardware blocks
• Collaborate with cross‑functional teams to integrate FPGA designs with software, firmware, and larger system architectures
• Test, verify, and validate FPGA designs, ensuring functional correctness, stability, and performance under real‑time constraints
• Optimize designs for timing, area, power, and throughput using HLS directives and traditional FPGA workflows
• Develop reusable hardware IP blocks, enabling scalable DSP pipelines and accelerating future development
• Maintain documentation, including design notes, block diagrams, interface definitions, user guides, and workflow references
• Contribute to innovation, identifying new techniques and

Skills

Degrees

Industry

Company size

Security clearance